Process and device for deterministic transmission of asynchronous data in packets

ABSTRACT

The present invention concerns a deterministic transmission process for asynchronous data in packets, in which the data arriving in asynchronous manner is stored in batteries ( 11 ) as and when it arrives, the said process comprising the following stages:  
     reception of data contained in a set of batteries in one of several packeting modules ( 13 ), start of packeting, packeting with sorting and enhancement of data, end of the packeting, and sending of the made-up packet,  
     stoppage of the packet composition during realization in a packeting module ( 13 ) when a message composition module ( 15 ) needs this packet, transmission of the packet thus made up, start of the realization cycle of a new packet,  
     recovery one after another of the packets thus created, in a predefined order, in the message composition module ( 15 ),  
     setting the message, made up in the message composition module ( 15 ) in the electrical format in the protocol used for the transmission.  
     The invention also concerns a device for deterministic transmission of asynchronous data in packets.

DESCRIPTION

[0001] 1. Technical field

[0002] The present invention concerns a process and device fordeterministic transmission of asynchronous data in packets.

[0003] 2. Status of the Previous Technique

[0004] In devices of the prior art for deterministic transmission ofasynchronous data in packets, the acquisition device and data acquiredby this device are asynchronous. Data packeting is made according to aninherent sequencing. A packet corresponds to one or several acquireddata processed with or without wrapping, the wrapping being made up of aheading and an end. The number of data transmitted in the output messagecorresponding to a packet is defined according to two criteria:

[0005] the number of data is restricted:

[0006] it is always the same, or

[0007] the maximum is specified

[0008] the distribution of data is positioned temporally in anequally-timed manner or not.

[0009] In the first example of data transmission from a packet i in theoutput message, as illustrated in FIG. 1, the number of data Mi isalways the same, and distributed in an equally-timed manner (Ti equaldelays).

[0010] In the second example of data transmission from a packet i in theoutput message, as illustrated in FIG. 2, the maximum number of data Miis always the same, it is MxTxi over an identified period of time Txi,and distributed unequally-timed (Txi variable delays)—MxTxi varies ateach Txi, with MxTxi≦Mi.

[0011] In the field of data acquisition and telemetry of flight testinginstallations, the numerical or digital data, conveyed on continuous andcyclic messages, issued by acquisition and processing systems of theprior art is stored in the FIFO (First in-First out) batteries as andwhen it arrives. The data arrives in a totally asynchronous manner.

[0012] A module for packeting facilitates placing certain data fromthese FIFO batteries according to a predefined order. It alsofacilitates enhancing this data with elements of the relative datecalculation type, data identification, and formatting of data, etc. Apacket thus obtained is therefore a group of data with a precise formatand containing data in a precise order.

[0013] A module for packeting operates according to the followingsuccession of stages:

[0014] 1) reception of data contained in the FIFO batteries (dump),

[0015] 2) start of packeting,

[0016] 3) packeting, with sorting and data enhancement,

[0017] 4) end of packeting,

[0018] 5) sending of the packet to a message composition module.

[0019] This message composition module recovers, one after the other,the packets created by the packeting modules. A message is then made upof successive packets in a predefined order.

[0020] A formatting module then facilitates setting the message inelectrical format in the protocol used for the transmission.

[0021] The operating cycle of the packeting module is self-sustaining.When the message composition module needs a packet, it sends a requestto the packeting module which transmits the packet if it is made up,i.e. if stage 4 is finished. If not, it sends nothing or else an emptypacket so as not to block the message composition module. The data istransmitted via the various stages 1 to 5—the data arrives, it is putinto packets by a self-sustaining device which has its own life, as itis only transferred in the message if the packet is ready. The messagecan contain no data, solely because the packeting has not been finished.

[0022] In these devices of the prior art, the data conveyed on themessages is at fixed slots in time. They are PCM (Pulse CodedModulation) type messages which meet the IRIG106 standard. The formalismof packeting, as a packet can be made up of one datum, is standardized.On the other hand, this standard stipulates nothing on the transmissiontime of the packets. It is the same for the CE83 and CCSDS standards.

[0023] As illustrated in FIG. 3, the data and transmission in the outputmessage are asynchronous, the transmission time TT therefore variesbetween the time of packeting TP and a duration 2*TP equal to twice thistime, as the transmission time in the output message TMS is such thatTMS<<TP.

[0024] The aim of the invention is to mitigate the disadvantages ofdevices of the prior art, by enabling:

[0025] transmission of the maximum amount of data in the output message,

[0026] controlling transmission time of the acquired data,

[0027] having the greatest possible ratio for the number ofacquired/wrapped data in the packet.

SUMMARY OF THE INVENTION

[0028] The invention concerns a process of deterministic transmission ofasychronous data in packets, in which data arriving asynchonously isstored in batteries as and when it arrives, the said process beingtypified in that it comprises the following stages:

[0029] reception of data contained in a set of batteries in one ofseveral packeting modules, start of packeting, packeting with sortingand enhancement of data, end of packeting and sending of the packet madeup,

[0030] stoppage of the packet make-up in the course of realization in apacketing module when a message composition module needs this packet,transmission of the packet thus made up, start of the realization cycleof a new packet,

[0031] recovery, one after another, of packets thus created in apredefined order in the message composition module,

[0032] setting the message, compiled in the message composition module,in the electrical format in the protocol used for the transmission.

[0033] In this process, a packeting module which is no longerself-sustained is used.

[0034] In this process, as soon as the message composition modulerequests a packet, it receives the latter for it is this module thatcontrols the packeting cycle.

[0035] Contrary to devices of the prior art in which the messages areonly compiled with “well finished” packets (with the risk of havingempty packets), in the process of the invention each message carriespackets perhaps “less well finished” but all the data which can be, istransmitted as soon as transmission is requested. The timing cycle ofdatum between input and output of a device implementing this process istherefore controlled.

[0036] The invention also concerns a device of deterministictransmission of asynchronous data in packets comprising:

[0037] at the least one input module receiving the input data,

[0038] batteries receiving numerical data stemming from this inputmodule,

[0039] several packeting modules each connected to at least one battery,

[0040] at the least one control module for battery dump monitored by atleast one packeting module,

[0041] a message composition module receiving the outputs of all thepacketing modules, which can send an order of end of packet make-up toeach one,

[0042] a module for formatting packets,

[0043] an output module capable of issuing each made-up packet on atransmission line.

[0044] The process and the device of the invention can be used notablyin data acquisition and real-time processing systems for testinstallations for new aeroplanes. The solution proposed in the inventionfor such systems offers the following advantages. To follow vibration(or flutter) tests which are very dangerous for a plane, it is essentialto perfectly control the transmission time TT, as the useful acquireddata must be given to a specialist with a delay TT either less than 100ms, or parameterized depending on the type of test. With the solutionstipulated in the invention TT=TP, while in the devices of prior artTP<TT<≅2*TP on the assumption that TMS<<TP. The objectives are thereforeoptimized with the solution of the invention. In fact, at fixed TT, TPis greater with the recommended solution than with the solution ofdevices of the prior art.

SHORT DESCRIPTION OF THE DRAWINGS

[0045]FIGS. 1 and 2 illustrate two examples of transmission of data froma packet, in a device of the prior art.

[0046]FIG. 3 illustrates an example of operation of a device of theprior art.

[0047]FIG. 4 illustrates the operation of the process of the invention.

[0048]FIG. 5 illustrates the device of the invention.

[0049]FIG. 6 illustrates an example of operation of the device of theinvention illustrated in FIG. 5.

[0050]FIGS. 7 and 8 illustrate an example of realization for anacquisition of arinc429 bus using respectively a device of the prior artand the device of the invention.

SUMMARY OF REALIZATION METHODS

[0051] The process of deterministic transmission of asynchronous data inpackets of the invention in which data arriving asynchronously is storedin FIFO batteries as and when it arrives, comprises the followingstages:

[0052] reception of data contained in the batteries,

[0053] start of packeting,

[0054] packeting with sorting and enhancement of data,

[0055] end of packeting,

[0056] sending of the packet to a message composition module whichrecovers the packets created one after another, in a predefined order,

[0057] and, when this message composition module needs a packet:

[0058] stoppage of make-up of the packet in the course of realization,

[0059] transmission of the packet thus made up,

[0060] start of the realization cycle of a new packet.

[0061] As illustrated in FIG. 4, the process of the invention consistsin synchronizing the start and end of packet make-up in relation totheir transmission in the output message—TMS being the transmission timein the output message, TP the packeting time and TT the transmissiontime with TT=TP+TMS. The solution obtained with TP>>TMS advantageouslymeets the previously specified objectives.

[0062] For an identified packet, the packeting limits the number ofacquired data to a figure x. If during the time TP, there are x+m datato be packeted, m data is then lost.

[0063] The device of the invention, illustrated in FIG. 5, comprises:

[0064] at the least, one input module 10 receiving input data, forexample a digital bus BN and analog data DA,

[0065] at the least a set of batteries 11 receiving digital data comingfrom this input module, possibly through an analog/digital converter 12,connected to at least one packeting module 13,

[0066] at the least one control module for battery dump 14 monitored byat least one packeting module 13,

[0067] a message composition module 15 receiving the outputs of all thepacketing modules 13, which can send an order of end of packet make-upto each one,

[0068] a module for formatting packets 16,

[0069] an output module 17 capable of issuing each made-up packet on atransmission line 18.

[0070] In the device of the invention, the digital or digitized data isstored in the FIFO batteries 11 as and when it arrives. The data arrivesin a totally asynchronous manner—seen from the device its arrival israndom.

[0071] The role of each packeting module 13 is to place certain datafrom the batteries 11 according to a predefined order. It can alsoenhance this data with elements of the relative date calculation type,data identification and formatting of the data. A packet is therefore agroup of data with a precise format and containing data in a preciseorder.

[0072] As described previously, each packeting module 13 operatesaccording to the following cycle:

[0073] 1) reception of the data contained in the batteries,

[0074] 2) start of the packeting,

[0075] 3) packeting with sorting and enhancement of the data,

[0076] 4) end of the packeting,

[0077] 5) sending of the packet to the message composition module.

[0078] What differentiates the device of the invention from devices ofthe prior art is the way in which each task 1 to 5 is triggered.

[0079] The message composition module 15 recovers the packets created bythe successive packeting modules 13 one after the other in a predefinedorder.

[0080] The operating cycle of this module 13 is not self-sustaining.When the message composition module 15 needs a packet, it sends therequest. This stops make-up of the packet in the course of realization.It transmits the packet thus made up then starts the realization cycleof a new packet.

[0081] The formatting module 16 is responsible for setting the message15 in electrical format in the protocol used for the transmission(recognised function and realization).

[0082] In an example of operation, the device of the invention comprisesthree packeting modules 13. The make-up of packets that they generate(P1, P2 and P3 respectively) is unimportant (data sorting, enhancing,etc.). As illustrated in FIG. 6, a message is made up of the successionof three packets—P1 followed by P2 followed by P3—which are transmittedby the message composition module 15 to the formatting module 16, TPbeing the packeting time. In this example wrapping elements are nottaken into consideration (start of frame, end of frame, checksum, etc.)realized by the formatting module 16.

[0083] At present an example of realization will be considered which isan acquisition of arinc429 bus on the assumption that TMS<<TP, TCB beingthe bus cycle time, the number of data always being the same, anddistributed in an equally-timed manner:

[0084]FIG. 7 illustrates operation of a device of the prior art,

[0085]FIG. 8 illustrates operation of the device of the invention asdescribed above.

[0086] The advantages of the solution proposed by the invention ascompared with devices of the prior art are shown in Table 1 at the endof the description. The device of the invention meets the objectivesdefined previously and reveals a very significant gain as compared withthe devices of the prior art. TABLE 1 Device of the prior art- Device ofDevice of Device of the Output message for the the invention/Device ofthe the time window TT prior art invention invention => gain Number ofdata 18 11 64% Number of wrappings 2 1 100%

1. Process for deterministic transmission of asynchronous data inpackets, in which data arriving asynchronously is stored in batteries(11) as and when it arrives, the said process being typified in that itcomprises the following stages: reception of data contained in a set ofbatteries in one or several packeting modules (13), start of packeting,packeting with sorting and enhancement of data, end of packeting andsending of the made-up packet, stoppage of packet make-up in the courseof realization in a pocketing module (13) when a message compositionmodule (15) needs this packet, transmission of the packet thus made up,and start of the realization cycle of a new packet, recovery one afteranother of the packets thus created, in a predefined order, in themessage composition module (15), setting of the message, made up in themessage composition module (15) to the electrical format in the protocolused for the transmission.
 2. Device for deterministic transmission ofasynchronous data in packets comprising: at the least one input module(10) receiving the input data, batteries (11) receiving digital datacoming from this input module, several packeting modules (13) eachconnected to at least one battery (11), at the least one control modulefor battery dump (14) monitored by at least one packeting module (13), amessage composition module (15) receiving the outputs of all thepacketing modules (13) and able to send to each of them an order for endof packet make-up, a module for formatting packets (16), an outputmodule (17) capable of issuing each made-up packet on a transmissionline (18).
 3. Use of the process according to claim 1, in dataacquisition and real-time processing systems for test installations ofnew aeroplanes.